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| 0805CS-120XGBC资料 | |
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0805CS-120XGBC PDF Download |
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File Size : 116 KB
Manufacturer: Description:erased. The blocks can be protected to prevent accidental Program or Erase commands from modifying the memory. Program and Erase com- mands are written to the Command Interface of the memory. An on-chip Program/Erase Controller simplifies the process of programming or erasing the memory by taking care of all of the special op- erations that are required to update the memory contents. The end of a program or erase operation can be detected and any error conditions identi- fied. The command set required to control the memory is consistent with JEDEC standards. Chip Enable, Output Enable and Write Enable sig- nals control the bus operation of the memory. They allow simple connection to most micropro- cessors, often without additional logic. The memory is offered in TSOP48 (12x20mm), and TFBGA48 (6x8mm, 0.8mm pitch) packages. The memory is supplied with all the bits erased (set to 1). |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：0805CS-120XGBC 厂 家： 封 装：08＋ 批 号：153000 数 量： 说 明：原装现货 |
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