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| 0805HT-4N7TJLC资料 | |
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0805HT-4N7TJLC PDF Download |
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File Size : 116 KB
Manufacturer: Description: This 18-bit universal bus transceiver is built using advanced dual metal CMOS technology. The ALVCH16901 is a dual 9-bit to dual 9-bit parity transceiver with registers. The device can operate as a feed-through transceiver or it can generate/check parity from the two 8-bit data buses in either direction. The ALVCH16901 features independent clock (CLKAB or CLKBA), latch-enable (LEAB or LEBA), and dual 9-bit clock enable (CLKENAB or CLKENBA) inputs. It also provides parity-enable (SEL) and parity-select (ODD/EVEN) inputs and separate error-signal (ERRA and ERRB) outputs for checking parity. The direction of data flow is controlled by OEAB and OEBA. When SEL is low, the parity functions are enabled. When SEL is high, the parity functions are disabled and the device acts as an 18-bit registered transceiver. The ALVCH16901 has been designed with a 24mA output driver. This driver is capable of driving a moderate to heavy load while maintaining speed performance. The ALVCH16901 has bus-hold which retains the inputs last state whenever the input bus goes to a high impedance. This prevents floating inputs and eliminates the need for pull-up/down resistors. |
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| 1PCS | 100PCS | 1K | 10K | ||
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型 号：0805HT-4N7TJLC 厂 家： 封 装：08＋ 批 号：12800 数 量： 说 明：原装现货 |
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运 费： 所在地： 新旧程度： |
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| 联系人：林小姐 |
| 电 话：0755-83041767,82716726 |
| 手 机：13570833454 |
| QQ：133289964,506456591,1062431938 |
| MSN：RFDZ0754@126.COM |
| 传 真：0755-82716726 |
| EMail：rxdz0754HK@126.com |
| 公司地址： 深圳市福田区华强北佳和大厦4C143 |
