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3329P-1-201LF

3329P-1-201LF资料
3329P-1-201LF
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File Size : 116 KB
Manufacturer:BOURNS
Description:The extremely high maximum data rate is achieved by three internal shift registers, each of 16-bit length and 4-bit width, which perform a serial to parallel conversion between the asynchronous input/output data streams and the memory array. The parallel data transfer from the 16 x 4-bit input shift register C to an addressed location of the memory array and from the memory array to one of the 16 x 4-bit output shift registers A or B is controlled by the serial column address (SAC) which contains the desired column address and an instruction code (mode bits) for transfer and refresh.
 
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型 号:3329P-1-201LF
厂 家:BOURNS
封 装:09+
批 号:3329P
数 量:
说 明:10000
 
 
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