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| B2302资料 | |
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B2302 PDF Download |
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File Size : 116 KB
Manufacturer: Description:When the Deserializer PLL locks to the embedded clock edge, the Deserializer LOCK pin asserts a low. If the Dese- rializer loses lock, the LOCK pin output will go high and the outputs (including RCLK) will enter TRI-STATE. The users system monitors the LOCK pin to detect a loss of synchronization. Upon detection, the system can arrange to pulse the Serializer SYNC1 or SYNC2 pin to resynchronize. Multiple resynchronization approaches are possible. One recommendation is to provide a feedback loop using the LOCK pin itself to control the sync request of the Serializer (SYNC1 or SYNC2). Dual SYNC pins are provided for mul- tiple control in a multi-drop application. Sending sync pat- terns for resynchronization is desirable when lock times within a specific time are critical. However, the Deserializer can lock to random data, which is discussed in the next section. |
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| 1PCS | 100PCS | 1K | 10K | ||
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型 号：B2302 厂 家： 封 装： 批 号：2587 数 量：原装现货，欢迎来电垂询 说 明：sot-23 |
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