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| BLM18RK221SN1D资料 | |
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BLM18RK221SN1D PDF Download |
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File Size : 116 KB
Manufacturer:村田 Description:The number formed by the full offset least significant bit register and full offset most significant bit register is referred to as m and determines the operation of PAF. PAE is synchronized to the LOW-to-HIGH transition of WCLK by one flip-flop and is set LOW when the number of unread words in the FIFO is greater than or equal to CY7C4261V (16k C m), CY7C4271V (32k C m), CY7C4281V (64k - m) and CY7C4291V (128k C m). PAF is set HIGH by the LOW-to-HIGH transition of WCLK when the number of available memory locations is greater than m. |
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| 1PCS | 100PCS | 1K | 10K | ||
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型 号：BLM18RK221SN1D 厂 家：村田 封 装：08＋ 批 号：4K 数 量： 说 明：原装现货 |
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