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| BLM31PG500SN1K资料 | |
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BLM31PG500SN1K PDF Download |
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File Size : 116 KB
Manufacturer: Description:When no data transfer occurs, you can use the Powerdown state. The Serializer and Deserializer use the Powerdown state, a low power sleep mode, to reduce power consump- tion. The Deserializer enters Powerdown when you drive PWRDN and REN low. The Serializer enters Powerdown when you drive PWRDN low. In Powerdown, the PLL stops and the outputs enter TRI-STATE, which disables load cur- rent and reduces supply current to the milliampere range. To exit Powerdown, you must drive the PWRDN pin high. Before valid data exchanges between the Serializer and Deserializer, you must reinitialize and resynchronize the de- vices to each other. Initialization of the Serializer takes 510 TCLK cycles. The Deserializer will initialize and assert LOCK high until lock to the Bus LVDS clock occurs. |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：BLM31PG500SN1K 厂 家： 封 装：08＋ 批 号：2007 数 量： 说 明：原装现货 |
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