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BYV34-500资料 | |
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BYV34-500 PDF Download |
File Size : 116 KB
Manufacturer:NXP Description:Control information and data are written into or read-back from COMBO II via the serial control port consisting of the control clock CCLK, the serial data input/output CI/O, (or separate input, CI, and output, CO, on the TP3070 only), and the Chip Select input, CS. All control instructions require 2 bytes, as listed in Table 1, with the exception of a single byte power-up/down command. The byte 1 bits are used as fol- lows: bit 7 specifies power up or power down; bits 6, 5, 4 and 3 specify the register address; bit 2 specifies whether the in- struction is read or write; bit 1 specifies a one or two byte in- struction; and bit 0 is not used. To shift control data into COMBO II, CCLK must be pulsed 8 times while CS is low. Data on the CI/O (or CI) input is shifted into the serial input register on the falling edge of each CCLK pulse. After all data is shifted in, the contents of the input shift register are decoded, and may indicate that a 2nd byte of control data will follow. This second byte may ei- ther be defined by a second byte-wide CS pulse or may fol- low the first contiguously, i.e. it is not mandatory for CS to re- turn high between the first and second control bytes. At the end of CCLK8 in the 2nd control byte the data is loaded into the appropriate programmable register. CS may remain low continuously when programming successive registers, if de- sired. However, CS should be set high when no data trans- fers are in progress. To readback Interface Latch data or status information from COMBO II, the first byte of the appropriate instruction is |
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1PCS | 100PCS | 1K | 10K | ||
价 格 | |||||
型 号:BYV34-500 厂 家:NXP 封 装:2009 批 号:65000 数 量:SOT186A 说 明: |
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