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BZX84C11LT1G资料 | |
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BZX84C11LT1G PDF Download |
File Size : 116 KB
Manufacturer:ON Description:FUNCTION When write enable input WE is L, the contents of data inputs D0 to D7 are written into 1-line delay data only memory in syn- chronization with rise edge of write clock input WCK. At this time, the write address counter of 1-line delay data only memory is also incremented simultaneously. The write functions given below are also performed in syn- chronization with rise edge of WCK. When WE is H, a write operation to 1-line delay data only memory is inhibited and the write address counter of 1-line delay data only memory is stopped. When write reset input WRES is L, the write address counter of 1-line delay data only memory is initialized. When read enable input RE is L, the contents of 1-line delay data only memory are output to data outputs Q00 to Q07 and those of 2-line delay data only memory to data outputs Q10 to Q17 in synchronization with the rise of read clock input RCK. At this time, the read address counters of 1-line and 2-line delay data only memories is also incremented simulta- neously. |
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1PCS | 100PCS | 1K | 10K | ||
价 格 | |||||
型 号:BZX84C11LT1G 厂 家:ON 封 装:2009 批 号:65000 数 量:SOT-23 说 明: |
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