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| FBMJ3216HS850-T资料 | |
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FBMJ3216HS850-T PDF Download |
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File Size : 116 KB
Manufacturer: Description:Receive power management (RXCC mode) is activated by setting the RXCC bit in the MII register (MR16.0). In this mode of operation, the adaptive equalizer, the clock recovery phase lock loop (PLL), and all other receive circuitry will be powered down when no valid signal is present at the UTP receive line interface. As soon as a valid signal is detected, all circuits will automatically be powered up to resume normal operation.During this mode of operation, RX_CLK will be inactive when there is no data being received. Note that the RXCC mode is not supported during 10BASE-T operation. |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：FBMJ3216HS850-T 厂 家： 封 装：08＋ 批 号：8000 数 量： 说 明：原装现货 |
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