|
|||||||
|
|||||||
|
|
|
|||||||
|
|||||||
|
|
| KL732ATE4N7C资料 | |
|
KL732ATE4N7C PDF Download |
|
File Size : 116 KB
Manufacturer: Description:The CDS mode of operation supports both line and pixel-clamp modes and can be used to achieve signifi- cant reduction in system 1/f noise and CCD reset clock feed-through. In S/H mode the internal DC- restore voltage clamp can be enabled or disabled to support AC-coupled or DC inputs. Sampling mode, 10-bit PGA gain (1024 linear steps), 8-bit fine offset adjustment (256 linear steps), 2-bit gross offset adjust- ment and input signal polarity are all programmable through a serial interface. PGA gain range is 1 to 10, and channel offset range is -300mV to 300mV for fine adjustment and additional -400mV to +200mV for gross offset adjustment. The A/D Full-Scale Range (FSR) is programmable to 2V or 3V. |
|
| 相关型号 | |
| ◆ STM32H745ZIT6 | |
| ◆ FT838NB1-RT | |
| ◆ AO4485 | |
| ◆ RFANT5220110A0T | |
| ◆ RFANT3216120A5T | |
| ◆ P13-I39606 | |
| ◆ DF30FC-40DS-0.4V(82) | |
| ◆ JS202011SCQN | |
| ◆ 2041119-1 | |
| ◆ 541044031 | |
| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
|
型 号：KL732ATE4N7C 厂 家： 封 装：08＋ 批 号：12300 数 量： 说 明：原装现货 |
|||||
|
运 费： 所在地： 新旧程度： |
|||||
| 联系人：林小姐 |
| 电 话：0755-83041767,82716726 |
| 手 机：13570833454 |
| QQ：133289964,506456591,1062431938 |
| MSN：RFDZ0754@126.COM |
| 传 真：0755-82716726 |
| EMail：rxdz0754HK@126.com |
| 公司地址： 深圳市福田区华强北佳和大厦4C143 |
