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LFA24-2A1A144MT

LFA24-2A1A144MT资料
LFA24-2A1A144MT
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Description:Accesses to the SDRAM are burst oriented. Consecutive memory location in one page can be accessed at a burst length of 1, 2, 4, 8 or full page when a bank and row is selected by an ACTIVE command. Column addresses are automatically generated by the SDRAM internal counter in burst operation. Random column read is also possible by providing its address at each clock cycle. The multiple bank nature enables interleaving among internal banks to hide the precharging time.
 
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型 号:LFA24-2A1A144MT
厂 家:
封 装:SMD
批 号:09+
数 量:2000
说 明:原装现货
 
 
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