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LQM18NN1R8K00D

LQM18NN1R8K00D资料
LQM18NN1R8K00D
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Description:The FCT273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The register is fully edge-triggered. The state of each D in- put, one setup time before the LOW-to-HIGH clock transi- tion, is transferred to the corresponding flip-flops Q output. All outputs will be forced LOW independently of Clock or Data inputs by a LOW voltage level on the MR input. The de- vice is useful for applications where the true output only is re- quired and the Clock and Master Reset are common to all storage elements.
 
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型 号:LQM18NN1R8K00D
厂 家:
封 装:08+
批 号:20000
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说 明:原装现货
 
 
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