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| MM3Z4V7ST1G资料 | |
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MM3Z4V7ST1G PDF Download |
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File Size : 116 KB
Manufacturer:ON Description:product term timing. For optimization of logic, the XPLA3 CPLD architecture includes a Fold-back NAND path (TLOGI3). There is a fast input path to each macrocell if used as an Input Register (TFIN). XPLA3 also includes universal control terms (TUDA) that can be used for synchronization of the macrocell registers in different logic blocks. There is also slew rate control and output enable control on a per macrocell basis. |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：MM3Z4V7ST1G 厂 家：ON 封 装：2009 批 号：65000 数 量：SOD-323 说 明： |
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