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MM3Z6V2ST1G

MM3Z6V2ST1G资料
MM3Z6V2ST1G
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File Size : 116 KB
Manufacturer:ON
Description:The chip-erase mode can be initiated by a six-byte command sequence. After the command loading cycle, the device enters the internal chip erase mode, which is automatically timed and will be completed within fast 100 mS (max). The host system is not required to provide any control or timing during this operation. If the boot block programming lockout is activated, only the data in the other memory sectors will be erased to FF(hex) while the data in the boot block will not be erased (remains as the same state before the chip erase operation). The entire memory array will be erased to FF(hex) by the chip erase operation if the boot block programming lockout feature is not activated. The device will automatically return to normal read mode after the erase operation completed. Data polling and/or Toggle Bits can be used to detect end of erase cycle.
 
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型 号:MM3Z6V2ST1G
厂 家:ON
封 装:2009
批 号:65000
数 量:SOD-323
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