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| NCP18XW222J03RB资料 | |
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NCP18XW222J03RB PDF Download |
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File Size : 116 KB
Manufacturer: Description:Open-drain output option in MAX 7000S devices Programmable macrocell flipflops with individual clear, preset, clock, and clock enable controls Programmable power-saving mode for a reduction of over 50% in each macrocell Configurable expander product-term distribution, allowing up to 32 product terms per macrocell 44 to 208 pins available in plastic J-lead chip carrier (PLCC), ceramic pin-grid array (PGA), plastic quad flat pack (PQFP), power quad flat pack (RQFP), and 1.0-mm thin quad flat pack (TQFP) packages Programmable security bit for protection of proprietary designs 3.3-V or 5.0-V operation CMultiVoltTM I/O interface operation, allowing devices to interface with 3.3-V or 5.0-V devices (MultiVolt I/O operation is not available in 44-pin packages) CPin compatible with low-voltage MAX 7000A and MAX 7000B devices Enhanced features available in MAX 7000E and MAX 7000S devices CSix pin- or logic-driven output enable signals CTwo global clock signals with optional inversion CEnhanced interconnect resources for improved routability CFast input setup times provided by a dedicated path from I/O pin to macrocell registers CProgrammable output slew-rate control Software design support and automatic place-and-route provided by Alteras development system for Windows-based PCs and Sun SPARCstation, and HP 9000 Series 700/800 workstations |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：NCP18XW222J03RB 厂 家： 封 装：08＋ 批 号：123000 数 量： 说 明：原装现货 |
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运 费： 所在地： 新旧程度： |
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| 联系人：林小姐 |
| 电 话：0755-83041767,82716726 |
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