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| P6KE15A资料 | |
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P6KE15A PDF Download |
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File Size : 116 KB
Manufacturer:TS Description:The Input/Output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recommended conditions. All voltage parameters are absolute referenced to VSS. The VS offset rating is tested with all supplies biased at 15V differential (Note 1). All input pin (VIN ) and IITRIP are clamped with a 5.2V zener diode and pull-up resistor to VDD |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：P6KE15A 厂 家：TS 封 装：DIP 批 号：40000 数 量： 说 明： |
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运 费： 所在地： 新旧程度： |
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| 联系人：林小姐 |
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