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| PESD5V0S1UB资料 | |
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PESD5V0S1UB PDF Download |
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File Size : 116 KB
Manufacturer: Description:Reset Output. RESET is an active LOW, open drain output which goes active whenever VCC falls below the minimum VCC sense level. It will remain active until VCC rises above the min- imum VCC sense level for typically 200ms. RESET goes active if the Watchdog Timer is enabled and SDA remains either HIGH or LOW longer than the selectable Watchdog time- out period. A falling edge on SDA, while SCL is HIGH, resets the Watchdog Timer. RESET goes active on power up and remains active for typically 200ms after the power supply stabilizes. |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：PESD5V0S1UB 厂 家： 封 装：SMD 批 号：09+ 数 量：5000 说 明：原装现货 |
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