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| SLF7045T-470MR75-PF资料 | |
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SLF7045T-470MR75-PF PDF Download |
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File Size : 116 KB
Manufacturer:TDK Description: The SLF7045T-470MR75-PF Clock Driver uses an internal phase locked loop (PLL) to lock low skew outputs to one of two reference clock inputs. Eight outputs are available: Q0-Q4, 2xQ, Q/2, Q5. Careful layout and design insures < 500ps skew between the Q0-Q4, and Q/2 outputs. The SLF7045T-470MR75-PF includes an internal RC filter which provides excellent jitter characteris- tics and eliminates the need for external components. In addition, TTL level outputs reduce clock signal noise. Various combinations of feed- back and a divide-by-2 in the VCO path allow applications to be custom- ized for linear VCO operation over a wide range of input SYNC fre- quencies. The VCO can also be disabled by the PLL_EN signal to allow low frequency or DC testing. The LOCK output asserts to indicate when phase lock has been achieved. The SLF7045T-470MR75-PF is designed for use in high-performance workstations, multi-board computers, networking hardware, and mainframe systems. Several can be used in parallel or scattered throughout a system for guaranteed low skew, system-wide clock distri- bution networks. |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：SLF7045T-470MR75-PF 厂 家：TDK 封 装：SMD 批 号：09+ 数 量：2000 说 明：原装现货 |
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运 费： 所在地： 新旧程度： |
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| 联系人：林小姐 |
| 电 话：0755-83041767,82716726 |
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| 公司地址： 深圳市福田区华强北佳和大厦4C143 |
