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| SN74LVC1G86DCKR资料 | |
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SN74LVC1G86DCKR PDF Download |
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File Size : 116 KB
Manufacturer:TI Description:Notes: 8. Test conditions assume signal transition time of 1V/ns or less, timing reference levels of VCC(typ.)/2, input pulse levels of 0 to VCC(typ.), and output loading of the specified IOL. 9. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZBE is less than tLZBE, tHZOE is less than t. 10. tHZOE, tHZCE, tHZBE, and tHZWE transitions are measured when the outputs enter a high-impedance state. 11. The internal write time of the memory is defined by the overlap of WE, CE1 = VIL, and CE2 = VIH. All signals. 12. Device is continuously selected. OE, CE1 = VIL, CE2 = VIH. 13. WE is HIGH for Read cycle. |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：SN74LVC1G86DCKR 厂 家：TI 封 装：SMD 批 号：SC70-5 数 量：1500 说 明：原装现货 |
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